The invention relates to a control circuit for a printing head of a metal paper printer, with electrodes arranged on a slope.
The function of such control circuits is to edit stored information in such a manner that it is suitable for being printed by a print head with electrodes arranged on a slope.
German Offenlegungsschrift OS No. 27 15 889, of which U.S. Pat. No. 4,163,285 is a counterpart, describes such a control circuit. It is used for reproducing characters consisting of individual image elements and structured in matrix fashion according to image element rows and columns, said characters being provided in print image fidelity in a main storage, each electrode of the printing head being associated with an image element row, and the electrodes being staggered in horizontal projection by the D-fold of their electrode width. It is characterized in that a buffer storage addressable by row and column is provided for alternately receiving the information of a picture element column in a read-in phase, and supplying information in a read-out phase for controlling the electrodes, that the rows of this buffer storage are each associated with a picture element row or with a printing electrode, respectively, that the character information of the main storage can be read out by picture element columns, that during each read-in phase of the buffer storage the information of a picture element column of the main storage can be bit-serially applied to the buffer storage via a parallel-series converter, and that the individual bits corresponding to the picture elements can be written into the positions of the buffer storage which are addressable via a picture element row counter (5) with respect to their row address, and via an adder with respect to their column address, by means of which adder the product of a multiplication circuit which at its two inputs is connected to a register for storing factor D and to the character element row counter (5) for supplying its count, is added to the count of a counter (6), and that the counter (6) receives a count pulse via a flip-flop connected to a picture element character counter (5) after two cycles of this picture element row counter (5), and that during the read-out phases of the buffer storage one respective column of this buffer storage can be read out, the addressing of the individual bits being executable via the picture element row counter (5) for supplying the row address, and via the counter (6) for supplying the column address, and that during the read-out phases the multiplication circuit connected to the flip-flop is switched off.
As explained below in the specification with reference to FIG. 2A of the present patent application, this control circuit was relatively complex; furthermore, owing to the serial processing of the data to be entered into and read out of the buffer, the time required was considerable.